Download Bijoux en cristal: Tissage de perles by Marie Le Sueur PDF

By Marie Le Sueur

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25 cm Figure 3-7 Interconnecting Lead. 3 TESTING THE PARALLEL PORT Also shown on the diagram of Figure 3-6, is a resistor and light emitting diode (LED), representative of a group of eight such devices. This circuit is used to indicate the state of data coming from the PC or the interface board itself. Check the data generated within the interface board by connecting the relevant output pins of the circuit to individual resistor and LED pairs. To test programs that read data into the PC through the parallel port, the interface board has a number of pcb pins permanently connected to either +5V or GND.

Each group of wires are controlled, or read, by accessing three sequential locations in the PC’s Input/Output address space, abbreviated to I/O address space. This address space is made up of a number of data storage locations used to allow intercommunication with input/output devices. It is different from the memory generally used by the computer. The PC writes data to particular I/O addresses, where the data is stored and can be accessed by external devices. Other I/O addresses are used to allow external devices to write data into storage for the PC to read, and still other I/O addresses allow bi-directional data transfer.

The value of the filter to be used is: 0x80 = 1 0 0 0 0 0 0 0 The required operation is shown in Table 3-6. Note that the unused and therefore invalid data bits D0, D1 and D2 are shown as ‘x’ in the example. These bits can be in either logic state and therefore the Exclusive OR result will also be indeterminate for these bits. Table 3-6 Inversion of bit 7. Bit no. Operand A (data received) Operation 7 6 5 4 3 2 1 0 1 0 1 1 1 x x x XOR Operand B (the filter, 0x80) 1 0 0 0 0 0 0 0 Result (corrected data) 0 0 1 1 1 x x x Listing 3-4 Reading the port BASE+1 with internal inversions compensated.

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